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Professor of Informatics and Computing
The New Cluster Paradigm for Exascale Computing
Wednesday, November 30, 2011
Building 3 Auditorium - 11:00 AM
(Coffee and cookies at 10:30 AM)
For nearly two decades since the pioneering Beowulf Project at the Goddard Space Flight Center, commodity clusters have excelled due to the exponential growth of processor performance and the ubiquity of the MPI programming interface that mapped applications on to resources. Processor performance is no longer increasing significantly due to the flat-lining of clock rates because of power limitations and the saturation of Instruction Level Parallelism through exhaustion of processor complexity. With heterogeneous node architectures comprising multicore sockets in combination with GPU accelerators, MPI and its underlying Communicating Sequential Processes (CSP) execution model are no longer sufficient or even appropriate for parallel application programming of future clusters. Ad hoc methods of combining different levels of programming models provide short-term examples of the potential of such systems but at the expense of programmability, portability, and efficiency. Throughout the remarkable trillion X performance improvement history of digital electronic computing, the field has experienced at least five distinct phases; CSP the most recent. Each was driven by technology trends requiring new architectures and new programming models; often with a change in underlying paradigm as well. Clusters and the field of HPC it dominates are entering such a phase shift requiring a new paradigm for guiding the programming of new parallel algorithms and governing the design of future cluster nodes. This presentation identifies the challenges facing commodity cluster architecture and programming and describes a new execution model, ParalleX, which may provide a strategy for addressing them. Using the experimental runtime software system, HPX, which serves as a reference implementation for ParalleX, results from several parallel applications will be shown to exhibit dramatic scaling characteristics through advanced flow control methods. The implications for a future cluster paradigm will be considered that may enable Exascale computing by the end of this decade.
Dr. Thomas Sterling holds the position of Professor of Informatics and Computing at the Indiana University (IU) School of Informatics and Computing as well as serving as Associate Director of the PTI Center for Research in Extreme Scale Technologies (CREST). He also is an Adjunct Professor at the Louisiana State University (LSU) Center for Computation and Technology (CCT) and CSRI Fellow at Sandia National Laboratories. Since receiving his Ph.D from MIT in 1984 as a Hertz Fellow he has engaged in applied research in related fields associated with parallel computing system structures, semantics, and operation in industry, government labs, and academia. Dr. Sterling is best known as the "father of Beowulf" for his pioneering research in commodity/Linux cluster computing. He was awarded the Gordon Bell Prize in 1997 with his collaborators for this work. He was the PI of the HTMT Project sponsored by NSF, DARPA, NSA, and NASA to explore advanced technologies and their implication for high-end system architectures. This three-year project involved a dozen institutions and 50 researchers to investigate superconducting logic, holographic storage, optical networks, and Processor-In-Memory components. Other research projects included the DIVA PIM architecture project with USC-ISI, the Cray Cascade Petaflops architecture project sponsored by the DARPA HPCS Program, and the Gilgamesh high-density computing project at NASA JPL. Thomas Sterling is currently engaged in research associated with the ParalleX advanced execution model for extreme scale computing. This work is to devise a new model of computation establishing the foundation principles to guide the co-design for the development of future generation Exascale computing systems by the end of this decade. This research is conducted through several projects sponsored separately by DOE, NSF, DARPA, Army Core of Engineers, and NASA. Dr. Sterling is the co-author of six books and holds six patents.
IS&T Colloquium Committee Host: Jim Fischer
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